Ethernet MAC IP
Tri-speed Ethernet MAC connecting FPGA user logic to a GMII/MII or RGMII PHY through AXI4-Stream data ports and AXI4-Lite control registers.
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FPGA IP cores & system solutions
Synthesizable, hardware-validated IP cores and FPGA-based systems, delivered with integration guides, verification packages and reference projects.
- 5Products
- AMD & MicrochipFPGA platforms
- VHDL & VerilogRTL
BCH Encoder/Decoder IP Core
Synthesizable VHDL BCH error correction engine for raw NAND flash, correcting up to 12 bits per 512-byte sector with a low LUT footprint.
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CAN Controller IP Core
Synthesizable VHDL CAN 2.0A/2.0B controller in two variants: a FIFO-style interface, or an AXI4-Lite drop-in replacement for AMD AXI CAN (DS791) that runs with the unmodified XCan driver.
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DShot Data Transmitter IP
Parametric DShot150/300/600/1200 transmitter driving up to 16 ESCs from FPGA logic or a host CPU over AXI4-Lite. Vendor independent, pure VHDL.
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Ultra-Low-Latency Video over Fiber
FPGA-based ultra-low-latency video over fiber: 4× 3G-SDI, Gigabit Ethernet, CAN FD and 5× UART on one fiber, with no external DDR buffering. Delivered to customers.
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From requirements to hardware bring-up, we develop IP cores and FPGA systems tailored to your project.