NewANADOLOGIC Hardware Academy is live: 240 free, AI-graded FPGA & SoC questions.Start learning

This training is similar to Training Program #4; however, AMD’s MicroBlaze soft processor is used as the CPU. It has previously been delivered to QUBITRIUM.

Program Schedule

Day 1Day 2Day 3Day 4Day 5
Morning
MicroBlaze Intro
AXI Protocol
AXI Timer
AXI Interrupt Controller
TEMAC
AXI Ethernet Lite
AXI DMA & AXI-Stream
HW Design in Vivado
Creating Custom AXI4 Peripherals in Vivado
LunchLunch & RecoverLunch & RecoverLunch & RecoverLunch & RecoverLunch & Recover
Afternoon
Vivado & Vitis Intro
MIG, AXI UART Lite, AXI GPIO, XADC
AXI QSPI, AXI IIC
AXI CAN, AXI UART 16550
AXI DMA & AXI-Stream
SW Design in Vitis
SW Examples for AXI4 Custom Peripherals

Peripherals Covered

MIG, AXI UART Lite, AXI GPIO, XADC, AXI Timer, AXI Interrupt Controller, AXI QSPI, AXI IIC, TEMAC, AXI Ethernet Lite, AXI CAN, AXI UART 16550, AXI DMA & AXI-Stream, Custom AXI4 Peripherals

Who Should Attend

  • Engineers or candidate engineers working, or soon to be working, on AMD MicroBlaze SoC-based systems.
  • Managers, HW design, SW design, test and system engineers who work on MicroBlaze SoC-based systems and want to become knowledgeable about MicroBlaze from the system, HW and SW perspective.

Trainer

Mehmet Burak AYKENAR

Previously Delivered To

Interested in this program for your team?

Every program can be tailored to your team’s level, tools and target devices, and delivered on-site or online.